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MC100EL1648 5 V ECL Voltage Controlled Oscillator Amplifier
The MC100EL1648 is a voltage controlled oscillator amplifier that requires an external parallel tank circuit consisting of the inductor (L) and capacitor (C). A varactor diode may be incorporated into the tank circuit to provide a voltage variable input for the oscillator (VCO). This device may also be used in many other applications requiring a fixed frequency clock. The MC100EL1648 is ideal in applications requiring a local oscillator, systems that include electronic test equipment, and digital high-speed telecommunications. The MC100EL1648 is based on the VCO circuit topology of the MC1648. The MC100EL1648 uses advanced bipolar process technology which results in a design which can operate at an extended frequency range. The ECL output circuitry of the MC100EL1648 is not a traditional open emitter output structure and instead has an on-chip termination emitter resistor, RE, with a nominal value of 510 W. This facilitates direct ac-coupling of the output signal into a transmission line. Because of this output configuration, an external pull-down resistor is not required to provide the output with a dc current path. This output is intended to drive one ECL load (3.0 pF). If the user needs to fanout the signal, an ECL buffer such as the EL16 (EL11, EL14) type Line Receiver/Driver should be used.
NOTE: The MC100EL1648 is NOT useable as a crystal oscillator. http://onsemi.com MARKING DIAGRAMS*
8 8 1 SOIC-8 D SUFFIX CASE 751 1 8 8 1 TSSOP-8 DT SUFFIX CASE 948R 1 1648 ALYW K1648 ALYW
14 14 1 SOIC EIAJ-14 M SUFFIX CASE 965 KEL1648 AWLYWW 1
* * * * *
Typical Operating Frequency Up to 1100 MHz Low-Power 19 mA at 5.0 Vdc Power Supply PECL Mode Operating Range: VCC = 4.2 V to 5.5 V with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.5 V Input Capacitance = 6.0 pF (TYP)
A L, WL Y W, WW
= Assembly Location = Wafer Lot = Year = Work Week
*For additional marking information, refer to Application Note AND8002/D. VCC VCC
ORDERING INFORMATION
EXTERNAL TANK CIRCUIT BIAS POINT TANK OUTPUT
See detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet.
VEE
VEE
AGC
Figure 1. Logic Diagram
(c) Semiconductor Components Industries, LLC, 2004
1
May, 2004 - Rev. 4
Publication Order Number: MC100EL1648/D
MC100EL1648
BIAS 8 VEE 7 VEE 6 AGC 5 VCC 14 NC TANK NC BIAS NC 13 12 11 10 9 VEE 8
1
2
3 VCC
4 OUT
1 VCC
2 NC
3 OUT
4 NC
5 AGC
6 NC
7 VEE
TANK VCC
8 Lead
14 Lead
Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.
Figure 2. Pinout Assignments
Table 1. PIN DESCRIPTION
Pin No. 8 Lead 1 14 Lead 12 Symbol TANK VCC OSC Input Voltage Positive Supply ECL Output Description
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2, 3 4 5 1, 14 3 5 OUT AGC VEE Automatic Gain Control Input Negative Output 6, 7 8 7, 8 10 BIAS NC OSC Input Reference Voltage No Connect 2, 4, 7, 9, 11, 13
Table 2. ATTRIBUTES
Characteristic
Value N/A N/A
Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model
> 1 kV > 100 V > 1 kV Level 1 UL 94 V-0 @ 0.125 in 28 to 34 11
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Oxygen Index Transistor Count Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
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MC100EL1648
Table 3. MAXIMUM RATINGS
Symbol VCC VEE VI Iout TA Tstg qJA qJC qJA qJC qJA qJC Tsol Parameter Power Supply PECL Mode Power Supply NECL Mode PECL Mode Input Voltage NECL Mode Input Voltage Output Current Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm Standard Board <2 to 3 sec @ 248C SOIC-8 SOIC-8 SOIC-8 TSSOP-8 TSSOP-8 TSSOP-8 SOIC-14 SOIC-14 SOIC-14 Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI VCC VI VEE Condition 2 Rating 7 to 0 -7 to 0 6 to 0 -6 to 0 50 100 -40 to +85 -65 to +150 190 130 41 to 44 185 140 41 to 44 150 110 41 to 44 265 Unit V V V V mA mA C C C/W C/W C/W C/W C/W C/W C/W C/W C/W C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
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MC100EL1648
Table 4. PECL DC CHARACTERISTICS VCC = 5.0 V; VEE = 0.0 V +0.8 / -0.5 V (Note 2)
-40C Symbol IEE VOH VOL AGC VBIAS VIL VIH IL Input Current -5.0 Characteristic Power Supply Current Output HIGH Voltage (Note 3) Output LOW Voltage (Note 3) Automatic Gain Control Input Bias Voltage (Note 4) Min 13 3950 3040 1690 1650 1.5 2.0 -5.0 Typ 19 4170 3410 Max 25 4610 3600 1980 1800 Min 13 3950 3040 1690 1650 1.35 1.85 -5.0 25C Typ 19 4170 3410 Max 25 4610 3600 1980 1800 Min 13 3950 3040 1690 1650 1.2 1.7 85C Typ 19 4170 3410 Max 25 4610 3600 1980 1800 Unit mA mV mV mV mV V V mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Output parameters vary 1:1 with VCC. 3. 1.0 MW impedance. 4. This measurement guarantees the dc potential at the bias point for purposes of incorporating a varactor tuning diode at this point.
Table 5. NECL DC CHARACTERISTICS VCC = 0.0 V; VEE = -5.0 V +0.8 / -0.5 V (Note 5)
-40C Symbol IEE VOH VOL AGC VBIAS VIL VIH IL Input Current -5.0 Characteristic Power Supply Current Output HIGH Voltage (Note 6) Output LOW Voltage (Note 6) Automatic Gain Control Input Bias Voltage (Note 7) Min 13 -1050 -1960 -3310 -3350 -3.5 -3.0 -5.0 Typ 19 -830 -1590 Max 25 -399 -1400 -3020 -3200 Min 13 -1050 -1960 -3310 -3350 -3.65 -3.15 -5.0 25C Typ 19 -830 -1590 Max 25 -399 -1400 -3020 -3200 Min 13 -1050 -1960 -3310 -3350 -3.8 -3.3 85C Typ 19 -830 -1590 Max 25 -399 -1400 -3020 -3200 Unit mA mV mV mV mV V V mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Output parameters vary 1:1 with VCC. 6. 1.0 MW impedance. 7. This measurement guarantees the dc potential at the bias point for purposes of incorporating a varactor tuning diode at this point.
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MC100EL1648
GENERIC TEST CIRCUITS: Bypass to Supply Opposite GND
VCC 0.1 mF 8 (10) VIN C 1 KW * Tank #1 VEE 100 mF 0.01 mF L 1 (12) 6 (7) 7 (8) 5 (5) 3 (1) 0.1 mF 2 (14) 4 (3) ** FOUT L = Micro Metal torroid #T20-22, 8 turns #30 Enameled Copper wire (@ 40 nH) C = MMBV609 * Use high impedance probe (>1.0 MW must be used). ** The 1200 W resistor and the scope termination impedance constitute a 25:1 attenuator probe. Coax shall be CT-070-50 or equivalent. 8 pin (14 pin) Lead Package Tank Circuit Option #1, Varactor Diode
0.1 mF
0.1 mF
VCC
0.1 mF 8 (10) 3 (1)
0.1 mF 2 (14) 4 (3) FOUT L = Micro Metal torroid #T20-22, 8 turns #30 Enameled Copper wire (@ 40 nH) C = 3.0-35pF Variable Capacitance (@ 10 pF) Note 1 Capacitor for tank may be variable type. (See Tank Circuit #3.) Note 2 Use high impedance probe (> 1 MW ). 6 (7) 7 (8) 5 (5) 8 pin (14 pin) Lead Package
0.1mF
L
C 1 (12)
Test Point
Tank #2
VEE 100 mF 0.01 mF
0.1 mF
0.1 mF
Tank Circuit Option #2, Fixed LC
Figure 3. Typical Test Circuit with Alternate Tank Circuits
VP-P ta tb
50% PRF = 1.0MHz t Duty Cycle (Vdc) - a tb
Figure 4. Output Waveform
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MC100EL1648
OPERATION THEORY Figure 5 illustrates the simplified circuit schematic for the MC100EL1648. The oscillator incorporates positive feedback by coupling the base of transistor Q6 to the collector of Q7. An automatic gain control (AGC) is incorporated to limit the current through the emitter-coupled pair of transistors (Q7 and Q6) and allow optimum frequency response of the oscillator. In order to maintain the high quality factor (Q) on the oscillator, and provide high spectral purity at the output, transistor Q4 is used to translate the oscillator signal to the output differential pair Q2 and Q3. Figure 16 indicates the high spectral purity of the oscillator output (pin 4 on 8-pin SOIC). Transistors Q2 and Q3, in conjunction with output transistor Q1, provide a highly buffered output that produces a square wave. The typical output waveform can be seen in Figure 4. The bias drive for the oscillator and output buffer is provided by Q9 and Q11 transistors. In order to minimize current, the output circuit is realized as an emitter-follower buffer with an on chip pull-down resistor RE.
VCC 2 (14)
VCC 3 (1)
800 W
1.36 KW Q9
3.1 KW
660 W
167 W Q1 Q3 Q2 OUTPUT 4 (3)
1.6 KW
Q4 Q11 Q10 Q7 Q6 D1 330 W 400 W D2 Q8 16 KW 82 W 400 W 660 W 510 W Q5
VEE 7 (8)
BIAS 8 (10)
TANK 1 (12)
VEE 6 (7)
AGC 5 (5)
8 pin (14 pin) Lead Package
Figure 5. Circuit Schematic
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MC100EL1648
30 Measured Frequency (MHz) 25 FREQUENCY (MHz) 20 15 10 5 0 0 300 500 1000 2000 10000 8 (10) 0.1mF L C 4 (3) Tank #3 1 (12) VEE 100 mF 0.01 mF 6 (7) 7 (8) 5 (5) SIGNAL UNDER TEST 2 (14) 3(1) 1200* 0.1mF 10mF CAPACITANCE (pF) Calculated Frequency (MHz) L = Micro Metal torroid #T20-22, 8 turns #30 Enameled Copper wire (@ 40 nH) C = 3.0-35 pF Variable Capacitance (@ 10 pF) * The 1200 W resistor and the scope termination impedance constitute a 25:1 attenuator probe. Coax shall be CT-070-50 or equivalent. 8 pin (14 pin) Lead Package
0.1 mF
0.1 mF
Figure 6. Low Frequency Plot
100 80 FREQUENCY (MHZ)
60
40
L = Micro Metal torroid #T20-22, 8 turns #30 Enameled Copper wire (@ 40 nH) C = 3.0-35 pF Variable Capacitance (@ 10 pF) * The 1200 W resistor and the scope termination impedance constitute a 25:1 attenuator probe. Coax shall be CT-070-50 or equivalent. 8 pin (14 pin) Lead Package 300 8 (10) 0.1mF L C 4 (3) Tank #3 1 (12) VEE 100 mF 0.01 mF 6 (7) 7 (8) 5 (5) SIGNAL UNDER TEST 2 (14) 3(1) 1200* 0.1mF 10mF
20
Measured Frequency (MHz) Calculated Frequency (MHz)
0 0 0.2 0.3 CAPACITANCE (pF)
0.1 mF
0.1 mF
Figure 7. High Frequency Plot http://onsemi.com
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MC100EL1648
FIXED FREQUENCY MODE The MC100EL1648 external tank circuit components are used to determine the desired frequency of operation as shown in Figure 8, tank option #2. The tank circuit components have direct impact on the tuning sensitivity, IEE, and phase noise performance. Fixed frequency of the tank circuit is usually realized by an inductor and capacitor (LC network) that contains a high Quality factor (Q). The plotted curve indicates various fixed frequencies obtained with a single inductor and variable capacitor. The Q of the components in the tank circuit has a direct impact on the resulting phase noise of the oscillator. In general, when the Q is high the oscillator will result in lower phase noise.
570 f0 + 470 FREQUENCY (MHz) 370 270 170 70 0 -30 0.3 300 500 1000 2000 10000 CAPACITANCE (pF) VCC INDUCTANCE (nH) Measured Frequency (MHz) Calculated Frequency (MHz) 2p
Only high quality surface-mount RF chip capacitors should be used in the tank circuit at high frequencies. These capacitors should have very low dielectric loss (high-Q). At a minimum, the capacitors selected should be operating at 100 MHz below their series resonance point. As the desired frequency of operation increases, the values of the tank capacitor will decrease since the series resonance point is a function of the capacitance value. Typically, the inductor is realized as a surface-mount chip or a wound coil. In addition, the lead inductance and board inductance and capacitance also have an impact on the final operating point. The following equation will help to choose the appropriate values for your tank circuit design.
1 LT * CT
LT = Total Inductance CT = Total Capacitance Figure 9 and Figure 10 represent the ideal curve of inductance/capacitance versus frequency with one known tank component. This helps the designer of the tank circuit to choose desired value of inductor/capacitor component for the wanted frequency. The lead inductance and board inductance and capacitance will also have an impact on the tank component values (inductor and capacitor).
50 45 40 35 30 25 20 15 10 5 0 400 700 1000 FREQUENCY (MHz) 1300 160 Inductance vs. Frequency with 5 pF Cap
Where
0.1 mF 8 (10) 0.1 mF 3 (1)
0.1 mF 2 (14) 4 (3)
L
C FOUT 1 (12) 6 (7) 7 (8) 5 (5)
Test Point
Tank #2
VEE 100 mF 0.01 mF
Figure 9. Capacitor Value Known (5 pF)
0.1 mF 0.1 mF 50 45 40 CAPACITANCE (F) L = Micro Metal torroid #T20-22, 8 turns #30 Enameled Copper wire (@ 40 nH) C = 3.0-35 pF Variable Capacitance (@ 10 pF) Note 1 Capacitor for tank may be variable type. (See Tank Circuit #3.) Note 2 Use high impedance probe (> 1 MW ). 8 pin (14 pin) lead package QL 100 35 30 25 20 15 10 5 0 400 700 1000 FREQUENCY (Hz) 1300 160 Capacitance vs. Frequency with 4 nH Inductance
Figure 8. Fixed Frequency LC Tank
Figure 10. Inductor Value Known (4 nH) http://onsemi.com
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MC100EL1648
VOLTAGE CONTROLLED MODE The tank circuit configuration presented in Figure 11, Voltage Controlled Varactor Mode, allows the VCO to be tuned across the full operating voltage of the power supply. Deriving from Figure 6, the tank capacitor, C, is replaced with a varactor diode whose capacitance changes with the voltage applied, thus changing the resonant frequency at which the VCO tank operates as shown in Figure 3, tank option #1. The capacitive component in Equation 1 also needs to include the input capacitance of the device and other circuit and parasitic elements.
190 170 FREQUENCY (MHz) 150 130 110 90 70 50 0 2 4 6 8 10 Vin, INPUT VOLTAGE (V)
When operating the oscillator in the voltage controlled mode with Tank Circuit #1 (Figure 3), it should be noted that the cathode of the varactor diode (D), pin 8 (for 8 lead package) or pin 10 (for 14 lead package) should be biased at least 1.4 V above VEE. Typical transfer characteristics employing the capacitance of the varactor diode (plus the input capacitance of the device, about 6.0 pF typical) in the voltage controlled mode is shown in Plot 1, Dual Varactor MMBV609 Vin vs. Frequency. Figure 6, Figure 7, and Figure 8 show the accuracy of the measured frequency with the different variable capacitance values. The 1.0 kW resistor in Figure 11 is used to protect the varactor diode during testing. It is not necessary as long as the dc input voltage does not cause the diode to become forward biased. The tuning range of the oscillator in the voltage controlled mode may be calculated as follows:
f max + f min CD(max) ) CS CD(min) ) CS
Where
f min + 1 ( L(CD(max) ) CS ) 2p
Figure 12. Plot 1. Dual Varactor MMBV609, VIN vs. Frequency
VCC 0.1 mF 8 (10) VIN C 1 KW Tank #1 VEE 100 mF 0.01 mF 1 (12) 6 (7) 7 (8) 5 (5) ** 0.1 mF FOUT L * 3 (1) 0.1 mF 2 (14) 4 (3)
Where CS = Shunt Capacitance (input plus external capacitance) CD = Varactor Capacitance as a function of bias voltage Good RF and low-frequency bypassing is necessary on the device power supply pins. Capacitors on the AGC pin and the input varactor trace should be used to bypass the AGC point and the VCO input (varactor diode), guaranteeing only dc levels at these points. For output frequency operation between 1.0 MHz and 50 MHz, a 0.1 mF capacitor is sufficient. At higher frequencies, smaller values of capacitance should be used; at lower frequencies, larger values of capacitance. At high frequencies, the value of bypass capacitors depends directly on the physical layout of the system. All bypassing should be as close to the package pins as possible to minimize unwanted lead inductance. Several different capacitors may be needed to bypass various frequencies.
0.1 mF
*Use high impedance probe (>1.0 MegW must be used). **The 1200 W resistor and the scope termination impedance constitute a 25:1 attenuator probe. Coax shall be CT-070-50 or equivalent. L = Micro Metal torroid #T20-22, 8 turns #30 Enameled Copper wire (@ 40 nH) C = MMBV609 8 pin (14 pin) lead package
Figure 11. Voltage Controlled Varactor Mode
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MC100EL1648
WAVE-FORM CONDITIONING - SINE OR SQUARE WAVE The peak-to-peak swing of the tank circuit is set internally by the AGC pin. Since the voltage swing of the tank circuit provides the drive for the output buffer, the AGC potential directly affects the output waveform. If it is desired to have a sine wave at the output of the MC100EL1648, a series resistor is tied from the AGC point to the most negative power potential (ground if positive volt supply is used, -5.2 V if a negative supply is used) as shown in
+5.0Vdc
Figure 13. At frequencies above 100 MHz typical, it may be desirable to increase the tank circuit peak-to-peak voltage in order to shape the signal into a more square waveform at the output of the MC100EL1648. This is accomplished by tying a series resistor (1.0 kW minimum) from the AGC to the most positive power potential (+5.0 V if a positive volt supply is used, ground if a -5.2 V supply is used). Figure 14 illustrates this principle.
+5.0Vdc
1 10
14 3 Output 10
1
14 3 Output 1.0k min
12 7 8
5
12 7 8
5
Figure 13. Method of Obtaining a Sine-Wave Output
Figure 14. Method of Extending the Useful Range of the MC100EL1648 (Square Wave Output)
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MC100EL1648
SPECTRAL PURITY
10 dB / DEC
99.8
99.9
100.0
100.1
100.2
B.W. = 10 kHz, Center Frequency = 100 MHz Scan Width = 50 kHz/div, Vertical Scale = 10 dB/div
Figure 15. Spectral Purity
0.1 mF 8 (10) 0.1 mF L C 4 (3) Tank #3 VEE 100 mF 0.01 mF 1 (12) 6 (7) 7 (8) 5 (5) 2 (14) 3(1) 1200*
10 mF
SIGNAL UNDER TEST
L = Micro Metal torroid #T20-22, 8 turns #30 Enameled Copper wire (@ 40 nH) C = 3.0-35 pF Variable Capacitance (@ 10 pF) ** The 1200 W resistor and the scope termination impedance constitute a 25:1 attenuator probe. Coax shall be CT-070-50 or equivalent. 8 pin (14 pin) Lead Package
0.1 mF
0.1 mF
Spectral Purity Test Circuit Figure 16. Spectral Purity of Signal Output for 200 MHz Testing
Q Driver Device Q
Zo = 50 W
D Receiver Device
Zo = 50 W 50 W 50 W
D
VTT VTT = VCC - 2.0 V
Figure 17. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
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MC100EL1648
ORDERING INFORMATION
Device MC100EL1648D MC100EL1648DR2 MC100EL1648DT MC100EL1648DTR MC100EL1648M MC100EL1648MEL Package SOIC-8, Narrow Body SOIC-8, Narrow Body TSSOP-8 TSSOP-8 SOEAIJ-14 SOEAIJ-14 Shipping 98 Units / Rail 2500 Tape & Reel 100 Units / Rail 2500 Tape & Reel 50 Units / Rail 2000 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1642/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC100EL1648
PACKAGE DIMENSIONS
SOIC-8 NB D SUFFIX CASE 751-07 ISSUE AB
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
-X- A
8 5
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
TSSOP-8 DT SUFFIX CASE 948R-02 ISSUE A
8x
K REF 0.10 (0.004)
M
0.15 (0.006) T U
S 2X
TU
S
V
S
L/2
8
5
L
1 PIN 1 IDENT 4
B -U-
0.25 (0.010) M
0.15 (0.006) T U
S
A -V-
F DETAIL E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G K L M MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_
C 0.10 (0.004) -T- SEATING
PLANE
D
-W- G DETAIL E
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MC100EL1648
PACKAGE DIMENSIONS
SOIC EIAJ-14* M SUFFIX CASE 965-01 ISSUE O
NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5 THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE 0.50 LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 1.42 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.056
14
8
LE Q1 E HE M_ L DETAIL P
1
7
Z D e A VIEW P
c
b 0.13 (0.005)
M
A1 0.10 (0.004)
ECLinPS Plus is a trademark of Semiconductor Components Industries, LLC (SCILLC).
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MC100EL1648/D

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